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Re: Data Execution Prevention with Windows Vista "cquirke (MVP Windows shell/user)" <cquirkenews@nospam.mvps.org> wrote...
> On Mon, 13 Aug 2007 08:09:14 +1000, "Andrew McLaren"
>>"cquirke (MVP Windows shell/user)" <cquirkenews@nospam.mvps.org> wrote ...
>>> On Sun, 5 Aug 2007 22:01:28 +0100, "Synapse Syndrome"
> I'm not sure if it is (as above). I think that fabrication spans what
> you refer to as "pure 32-bit" and "64-bit" P4s.
It's just an OR/XOR confusion, based on imprecision in natural language.
The Prescott series included some chips which were 32-bit only, and some
chips which were 32/64 bit (ie, EM64T).
All Cedar Mill chips were 64-bit.
So, Prescott includes the last of the Pentium 4 chips that were 32-bit only.
These were a subset of the total set of Prescott chips. The set of Prescott
chips is the union of the sets of 32-bit Precott chips and 32/64-bit
Prescott chips. Prescott was the last core which had 32-bit only chips, but
not all Prescott chips where 32-bit only. Whereas, all Cedar Mill chips are
32/64 EM64T chips.
Now, let's see ...
X ? Y ? ?x, if x ? X then x ? Y, where X is the set of 32-bit Prescott
Processors and Y is the set of Prescott processors.
Or ... um, something like that, anyway ... :-)
>Let's not get too carried away with this 64-bit thing. It's not a
> deep processor redesign, like going from 286 to 386 or from P4 to the
> Core 2 core(s).
Well, having debugged a couple of Itanium memory dumps (or rather - I
*attempted* to debug a couple of Itanium memory dumps) I certainly agree
that EM64T is an evolutionary, not revolutionary change ... I saw the
revolution (Itanium) and it was a scary place (although a little bit
exciting, too).
Anyway ... probably something we should discuss over a beer, at the next MVP
Summit ... :-))
--
Andrew McLaren
amclar (at) optusnet dot com dot au |