CPU L2 Cache Memory setting in Vista

How to Set Vista for the CPU L2 Cache Memory Size​

   Information

The SecondLevelDataCache records the size of the processor cache, also known as the secondary or L2 cache. If the value of this entry is 0, Vista will attempt to retrieve the L2 cache size from the Hardware Abstraction Layer (HAL) for the platform. If Vista fails for some reason to retrieve the L2 cache size from HAL, then it uses a default CPU L2 cache size of only 256 KB. If the default value of the SecondLevelDataCache value is not 0, Vista will use the value (amount of memory) you set instead of 0 (for 256 KB) as the L2 cache size of. This value is designed as a secondary source of cache size information for Vista when the HAL cannot detect the L2 cache from the CPU.

   Note

This sets the SecondLevelDataCache inside the registry.

From Microsoft KB183063:

This is not related to the hardware; it is only useful for computers with direct-mapped L2 caches. Pentium II and later processors do not have direct-mapped L2 caches. SecondLevelDataCache can increase performance by approximately 2 percent in certain cases for older computers with ample CPU L2 memory (more than 64 MB) by scattering physical pages better in the address space so there are not so many L2 cache collisions. Setting SecondLevelDataCache to 256 KB rather than 2 MB (when the CPU has a 2 MB L2 cache) would probably have about a 0.4 percent performance penalty.

   Warning

Only set the value to what your processor actually has for the L2 cache size. Do not use a larger size than it actually has.

STEP ONE

Find Out the L2 Cache Size Reported by HAL

NOTE: This will show you how to see what the L2 cache size is for your CPU as it is reported to Vista by HAL. This value will be used in STEP TWO below to set the SecondLevelDataCache value for this as a backup in case HAL rarely could not detect the L2 cache from the CPU.

1. Generate a System Health Report.​

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2. Click on the Hardware Configuration arrow on the far right to expand it. (See screenshot below step 3)​

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3. Click on the Devices arrow on the far right to expand it. (See screenshot below)​

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4. Under Devices, scroll down to Motherboard Classes. (See screenshot below step 5)​

A) Click on the + sign to expand​

root\cimv2:SELECT * FROM Win32_Processor.​

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B) Click on the + sign to expand​

Win32_Processor.DeviceID="CPU0".​

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5. In that list, you will see L2CacheSize and the value beside it for it's size to use it in step 6 in STEP TWO below.​

NOTE: For this example you will see 6144 to be used for my CPU's 2x6144 (12MB) L2 size. Now, here's a kicker. The newer Yorkfield Core 2 Quads CPUs use the entire cache for both cores unlike the older CPUs that do not share. So a 2x6144 (12mb) L2 cache would use 12288 (2x6144) instead despite what is reported in Vista for HAL.​

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STEP TWO

Set the L2 Cache Size

NOTE: This will set the SecondLevelDataCache value in the registry, from the value gotten in STEP ONE, as a backup in case HAL rarely could not detect the L2 cache from the CPU and prevent having only a default L2 cache size of 256 KB used as L2 cache size instead by Vista.

1. Open the Start Menu.​

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2. In the white line (Start Search) area, type regedit and press Enter.​

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3. Click on Continue in the UAC prompt.​

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4. In regedit, go to: (See screenshot below)​

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HKEY_LOCAL_MACHINE\SYSTEM\CurrentControlSet\Control\Session Manager\Memory Management

5. In the right pane, right click SecondLevelDataCache and click on Modify.​

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6. Dot Decimal, and type in the value in bold (see table below) for your CPU L2 size from STEP ONE above. (See screenshot below table)​

NOTE: I have a CPU with a 2x6144 (12MB) L2 cache size, so I would use 6144 (Dec) or 1800 (Hex) since it is 2x. See STEP ONE above for how to get the L2 size for your CPU. Now, here's a kicker. The newer Yorkfield Core 2 Quads CPUs use the entire cache for both cores unlike the older CPUs that do not share. So a 2x6144 (12mb) L2 cache would use 122488 (Decimal) or 3000 (hex) instead despite what is reported in Vista for HAL.​

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Decimal Value	Hexadecimal Value
256 KB	100 (hex)
512 KB	200 (hex)
1024 KB (1MB)	400 (hex)
2048 KB (2MB)	800 (hex)
3072 KB (3MB)	c00 (hex)
4096 KB (4MB)	1000 (hex)
6144 KB (6MB)	1800 (hex)
8192 KB (8MB)	2000 (hex)
12288 KB (12MB)	3000 (hex)
16384 KB (16MB)	4000 (hex)

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7. Click on OK to apply.​

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8. Your registry will look like this below for a 2x6144 (12MB) L2 cache memory size.​

NOTE: See STEP ONE above to find out your CPU L2 cache size.​

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9. Close regedit.​

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10. Restart the computer to apply the change.​

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That's it,
Shawn

Related Tutorials

---

• How to Make a Program or Process Run with a Higher or Lower CPU Priority in Vista
• How to Set the Processor Affinity for a Application in Vista
• How to Change the Number of Processors Used at Boot Up in Vista

 

[abovesecret]

Thanks for the reply Shawn. I tried that method and it works like it should. Great site by the way. Im a total noob when it comes to vista and for me this site is a blessing.

 

[Brink]

Your welcome AboveSecret.

Shawn

 

[flazza]

Sorry if this is a stupid question

what do you put if it is dual cpu?

I have a dell precision 490 with 2x3ghz dual cores with each processor having 4mb cache (2048 KB per core)

 

[Brink]

Hi Flazza, and welcome to Vista Forums.

For the Dual-Core Intel® Xeon® 5160 3.0GHz, 1333 FSB, 4MB L2 Cache, 80 watts processor you would use 4MB (4096) since it's L2 memory is shared.

http://www.intel.com/business/enterprise/emea/eng/xeon/pdf/Competitive_Xeon_Brief.pdf

Dual-Core Intel® Xeon® Processor 5100 Series

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4M shared cache fully accessible by each core​

lowering memory latency and increasing performance

Hope this helps,
Shawn

 

[WildEagle]

I've been testing this tweak, and it seems to work so far. I have a Core 2 Duo E6600 with 4MB of cache, which means each core has access to 2MB of cache each.

 

[Brink]

Hi WildEagle,

Actually, looking up your CPUs specs, it shares the 4MB L2 cache with both cores. You can set it for the full 4MB.

This PDF document from Intel shows you the specifications for all Core 2 Duo processors.

http://download.intel.com/products/processor/core2duo/desktop_prod_brief.pdf

 

[WildEagle]

That's what I did was set it for 4MB's of cache. The cache being shared between the 2 cores simply means that each core has access to 2MB of cache each.

 

[ltwally]

That's what I did was set it for 4MB's of cache. The cache being shared between the 2 cores simply means that each core has access to 2MB of cache each.

Incorrect. On Core2Duo's, the cache is shared wholey by both cores. Therefore, each core sees an entire 4meg of cache - NOT 2meg of cache.

 

[ltwally]

It's worth re-quoting Microsoft on this registry value.

Detailed Explanation of SecondLevelDataCache

SecondLevelDataCache records the size of the processor cache, also known as the secondary or L2 cache. If the value of this entry is 0, the system attempts to retrieve the L2 cache size from the Hardware Abstraction Layer (HAL) for the platform. If it fails, it uses a default L2 cache size of 256 KB. If the value of this entry is not 0, it uses this value as the L2 cache size. This entry is designed as a secondary source of cache size information for computers on which the HAL cannot detect the L2 cache.

This is not related to the hardware; it is only useful for computers with direct-mapped L2 caches. Pentium II and later processors do not have direct- mapped L2 caches. SecondLevelDataCache can increase performance by approximately 2 percent in certain cases for older computers with ample memory (more than 64 MB) by scattering physical pages better in the address space so there are not so many L2 cache collisions. Setting SecondLevelDataCache to 256 KB rather than 2 MB (when the computer has a 2 MB L2 cache) would probably have about a 0.4 percent performance penalty.

If you do some research on your processor, it is not direct-mapped. You likely have an 8-way or 16-way set-associative.

According to a little time with google, it appears that neither Intel or AMD has produced a mainstream processor with a direct-mapped L2 cache for several processor generations.

This really is an old legacy key, and can be safely left at 0. Altering it should not harm your computer - but neither will you gain anything from it.

For more information, check out the wikipedia entry.

 

[WildEagle]

Incorrect. On Core2Duo's, the cache is shared wholey by both cores. Therefore, each core sees an entire 4meg of cache - NOT 2meg of cache.

You obviously know nothing. 4MBs of cache just because it is shared doesn't mean each core sees 4MB's of cache, it means each core has access to 2MB only not the full 4MB's. If each had access to the full 4MB, when multitasking a game and something else that also used that cache there would be problems out the rear.

Take a look at videocards like the 3870X2 which I own, it comes with 1GB of shared videomemory, but each chip only has access to 512MB of video memory at one time.

This is how dual core cpu's and videocards such as the 3870X2 operate, there is no way, that if they operated any other way, they would get anything done.

 

[ltwally]

You obviously know nothing. 4MBs of cache just because it is shared doesn't mean each core sees 4MB's of cache, it means each core has access to 2MB only not the full 4MB's. If each had access to the full 4MB, when multitasking a game and something else that also used that cache there would be problems out the rear.

Take a look at videocards like the 3870X2 which I own, it comes with 1GB of shared videomemory, but each chip only has access to 512MB of video memory at one time.

This is how dual core cpu's and videocards such as the 3870X2 operate, there is no way, that if they operated any other way, they would get anything done.

Wow. Ok, first: check your attitude.

Second: I do know what I'm talking about. That 4meg of L2 cache is dynamically allocated by the two processors. It's one of the crowning achievments that makes the Core2 series so powerful - there is no need for core0 to send L2 data from its cache to core1's "section." Both processors have full access to the entire cache - though only one processor may have access at any given moment. Intel did some really cool and tricky stuff to make this work.

You need to read up on the Core2 series and understand how it works.

On a dual-core Athlon series, their cache is usually labeled as 2x2meg. There is a reason - as each core has a physically seperate cache.

But Athlons do not have the advanced cache that the Core2 series does.

Before you make rude statements, do a little research. The core2 is a special exception to your knowledge, which is otherwise true!!!

 

[ltwally]

I'll do the research for you:

Advanced Smart Cache - Tom's Hardware : IDF Spring 2006: Will Intel's Core Architecture Close the Technology Gap?

Unlike all of your examples: the Core2 series shares its cache. Fully. There is no dividing line, giving core0 2megs and core1 2megs. The cache is dynamically allocated, and each processor has FULL access to the ENTIRE cache.

 

[Brink]

Itwally and WildEagle, lets keep this conversation going without any rudeness. I would hate to have to give out infractions for something so silly if it goes beyond this.


WildEagle,

I'm sorry, but you are mistaken. The Core 2 Duo processors shares the L2 cache fully between the cores. This is a good thing though for you. Your CPU will perform better with this way instead of the L2 cache split up between the cores.

http://download.intel.com/products/processor/core2duo/desktop_prod_brief.pdf


Shawn

 

[baconcow]

Hi NicoVO, and welcome to Vista Forums.

The Core 2 Quad Q9450 has two Dual Cores in it. Each Dual core has 6144 (6MB) for a total of 12 MB. You would use the Decimal setting 12288 since the L2 cache is shared fully between the cores with this CPU model.

This diagram provided by Itwally can help show this:


Hope this helps,
Shawn

Actually: The Q9450 is a Yorkfield. The Yorkfield is the latest generation of Core2Quad cpu's, and has a single, unified L2 cache.

For these new processors, the following is a correct diagram:

                FSB
                 |
                 |
--------------PROCESSOR--------------  
|                |                  |
|                |                  |
|            12 meg L2              |
|                |                  |
|                |                  |
|   ------------------------------- |
|   |         |         |         | |
|  core0     core1     core2  core3 |
|                                   |
-------------------------------------

This has a couple major benefits:
1) The Yorkfields have larger cache's, across the board.
2) All four cores can have access to the same data. There is no need to copy it from CacheA to CacheB. Because threads routinely flop around from core to core, this can be a real benefit. Also, it is a benefit for multithreaded apps.

I found out some information while looking through one of Intel's online datasheets. The Q9450 and Q9550 Quad Cores (and other Quad Cores) use 2x6144 KB L2 Caches. This can be found in Intel's datasheet at http://download.intel.com/design/processor/datashts/318726.pdf on page 11. This article refers to the 45nm Intel® Core™2Quad Processor's (Q9000 and Q8000) Series and the Intel® Core™2 Extreme Processor (QX9000 Series).

The processor is based on 45 nm process technology. The processor features the Intel®
Advanced Smart Cache, a shared multi-core optimized cache that significantly reduces
latency to frequently used data. The processors feature 1600 MHz and 1333 MHz front
side bus (FSB) frequencies and two independent but shared 6 MB of L2 cache (2x6M)
or two independent but shared 3 MB of L2 cache (2x3M) or two independent but shared
2 MB of L2 caches (2x2M).

I would put the 1800 HEX value if I were you. CPU-Z seemed to hit the mark correctly. For those wondering, my CPU multiplier is clocked down from 8.5 to 6.0 due to notebook speed-stepping.

 

[Brink]

Hi Baconcow, and welcome to Vista Forums.

Normally, that would be true with the CPU has independent L2 caches for each core, but this CPU model shares the L2 cache fully between the cores. Because of this you would use the 3000 (Hex) or 12288 (Decimal) settings instead for the full 12 MB.

Hope this helps,
Shawn

 

[baconcow]

Okay. Sounds good enough. However, I was able to clear up that it is indeed 2x6144 KB portions instead of one 12288 KB portion. So, I assume than that the drawing of the architecture where each core takes from the 12 MB cache is correct?

 

[Everlong]

Wow, reading this just makes me want to get rid of my Athlon x2 and get my Core 2 now. End of October and I'll have it :D

 

[Brink]

Okay. Sounds good enough. However, I was able to clear up that it is indeed 2x6144 KB portions instead of one 12288 KB portion. So, I assume than that the drawing of the architecture where each core takes from the 12 MB cache is correct?

Yep, you are correct for this CPU model. Both cores share the 2x6144 KB L2 caches fully.

 

[ltwally]

The next generation of Intel CPU's is slated for yet another shift. As I recall (off the top of my head), they will have 32 or 64 KB of L1 and 256 KB of L2 for each processor (read: core), and then a large shared L3 cache - much the same as some of AMD's current offering.

 

[Brink]

LOL, now that will be interesting.